IEEE 1149.1 JTAG
VLSI
IEEE 1149.1:IEEE Standard Test Access Port and Boundary Scan Architecture: Colin M. Maunder, Rodham E. Tulloss: 9780738182636: Amazon.com: Books
JTAG IEEE 1149.1 Standard WG
IEEE 1149.1 Boundary Scan
IEEE 1149.1:IEEE Standard Test Access Port and Boundary Scan Architecture: Colin M. Maunder, Rodham E. Tulloss: 9780738182636: Amazon.com: Books
JTAG Architecture – VLSI Tutorials
Boundary Scan - an overview | ScienceDirect Topics
Boundary-Scan Architecture and IEEE Std 1149.1
Lecture 28 IEEE JTAG Boundary Scan Standard - ppt video online download
Boundary Scan - an overview | ScienceDirect Topics
Boundary Scan Tutorial
Boundary-Scan Tool and Boundary-Scan Test (BST) | Intel
Technical Guide to JTAG - Corelis JTAG Tutorial
IEEE Std 1149.1-2001 - IEEE Standard Test Access Port and Boundary-Scan Architecture (Revision of IEEE Std 1149.1-1990 and IEEE Std 1149.1b-1994)
Boundary-Scan – JTAG
IEEE 1149.1-2013 - IEEE Standard for Test Access Port and Boundary-Scan Architecture
IEEE JTAG 1149.x Standards - Corelis Boundary-Scan Blog
2.1.2. JTAG Chip Architecture
The many faces of the JTAG port – Electronics World
